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Lecture of Nanostructure Engineering - A Path to Discovery, Innovation and Commercialization
Update time: 2011-06-17
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Nanostructure Engineering – A Path to Discovery, Innovation and Commercialization





Stephen Y. Chou




10:30am, June 22 (Wed)





Room A722, SINANO




Advance of our ability in engineering nanostructures offers a unique path to discovery and innovation in science and technology.  This is because when nanostructures become smaller than a fundamental physical length scale, conventional theory may no longer apply and new phenomena emerge.  This will not only deepen our knowledge, but also lead to better or revolutionary products in multiple areas arranging from consumer products to medicine.  Furthermore, to commercialize these new discoveries and innovations, it is essential to have low-cost high-throughput nanopatterning methods, which have been a grand challenge (and a key bottleneck) in nanotechnology. 


The talk will present some intriguing phenomena manifested in nanostructures in the areas of electronics, optics, magnetic, biotech and materials, when the device sizes are smaller than the electron wavelength, optical wavelength, magnetic domain wall size, DNA persistent length, single-crystal critical size, and defect diffusion length. Moreover, the talk will address a grand challenge essential to the success of nanotechnology and its commercialization: nanomanufacturing -- high-throughput and low-cost nanopatternings. Two different approaches will be presented: nanoimprint lithography (NIL), which has demonstrated the fabrication of sub-5 nm feature-size 3D patterning over large area, and guided self-assembly (GSA), in particular, those that have well-ordered self-assembly over an area of entire wafers, such as lithographically-induced self-assembly (LISA) and shear-force guided self-assembly.




Stephen Y. Chou, Joseph C. Elgin Professor of Engineering and the head of the NanoStructure Laboratory at Princeton University, is a world leader, pioneer, and inventor in a broad range of nanotechnologies. Dr. Chou received his PhD from MIT in 1986. He was a Research Associate and Acting Assistant Professor at Stanford University (1986--1989), and a faculty member at the University of Minnesota (1989-1991, Assistant Prof, 1991-1994, Associate Prof, and 1994-1997 Full Prof), and joined Princeton University in 1998. As an entrepreneur, Dr. Chou founded Nanonex (1999) and NanoOpto (2000) Corporations.
Dr. Chou's pioneering research and inventions in a broad spectrum of nanotechnologies and nanodevices has helped shape new paths in the fields of nanofabrication, nanoscale electronics, optoelectronics, magnetics, and materials. Dr. Chou's graduate work used X-ray lithography to scale MOSFETs to the 60 nm range, and since 1985 he has demonstrated various ultra-small MOSFETs, quantum devices, and single electron transistors. In early 1990's, he began pioneering work in exploring sub-wavelength optical elements (SOEs) and bringing nanofabrication into magnetic data storage media. He originated quantized magnetic disks (QMDs), a new paradigm in magnetic data storage in 1993. In 1995, he pioneered his best-known work, nanoimprint lithography (NIL), a revolutionary nanoscale patterning method that allows sub-10 nm patterning over large areas with high throughput and low cost. He is also a key inventor of lithographically induced self-assembly (LISA) and laser-assisted direct imprint (LADI) and applications of NIL, LISA and LADI in a wide range of disciplines, from electronics and optics to magnetics, biotech, and materials. Since 1999, he has been applying unique and extensive expertise in nanofabrication, nanoelectronics, nanooptics, nanomagnetics and nanomaterials to biology for developing innovative biological manipulators, separators, detectors and analyzers for DNAs, proteins and cells.

Dr. Chou's inventions and pioneer work have brought significant impacts to industry. Nanoimprint lithography is regarded as one of the "10 emerging technologies that will change the world" (MIT Technology Review); is selected as a next generation lithography for semiconductor ICs; and is becoming an enabling manufacturing platform for multiple multi-billion-dollar industries ranging from semiconductor ICs, magnetic data storage, displays, optics, biotech to nanomaterials. Furthermore, SOEs and QMDs are being developed by industries aggressively as a future of integrated optics and magnetic data storage.

Dr. Chou was elected to the National Academy of Engineering in 2007 and received the 2004 IEEE Brunetti Award for the invention and development of tools for nanoscale patterning, especially nanoimprint lithography, and for the scaling of devices into new physical regimes. Other awards he received include IEEE Fellow, Packard Fellow, an Inductee of New Jersey High Technology Hall of Fame, Pioneer Award of Nanoimprint and Nanoprint Technology, the Joseph C. Elgin Professorship, the McKnight-Land Grant Professorship, the George Taylor Distinguished Research Award at the University of Minnesota, DARPA ULTRA program Significant Technical Achievement Award, and three best paper awards. Dr. Chou has published more than 280 papers, has given over 100 invited presentations at conferences and workshops, and holds 15 patents and over 40 patent applications.

Now, Dr. Chou’s group, the NanoStructure Laboratory (NSL) at Princeton, has two primary missions: (A) to develop new nanotechnologies for fabricating structures substantially smaller, better, and cheaper than current technology permits; and (B) to explore innovative nanodevices and advanced materials in electronics, optics, optoelectronics, magnetics and biology, by combining cutting-edge nanotechnology with frontier knowledge from different disciplines. 

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