Figure 2 The cross-sectional and the horizontal views of the wrapping configurations of P-DPPb5T on SWCNTs with different chiralities.(Nanoscale, 2016, 8, 4588-4598.)
In addition, n-type and p-type top-gate TFTs have been printed on the same flexible PET substrates using the polymer-sorted sc-SWCNTs as channel materials and ALD HfO2 thin films as shared gate dielectrics (shown in Figure 3). Both show on/off ratio of ~105, mobility of ~15 cm2V-1s-1 and small hysteresis. Flexible CMOS inverter and 3-stage ring oscillator were also fabricated. The flexible CMOS inverters exhibit large noise margin at low voltage (84% of 1/2 Vdd=1.5 V), the maximum voltage gain of 30 at Vdd of 1.5 V and low power consumption (0.1μW). The printed CMOS inverters work well at 10 kHz with 2% voltage loss and delay time of ~15 μs. The 3-stage ring oscillator has the oscillation frequency of 3.3 kHz at Vddof 1 V. This work has been published on Small (2016, DOI: 10.1002/smll.201600452).
Figure 3 The schematic illustration of fabrication and electrical properties of n-type and p-type printed TFTs, performance of printed CMOS inverters on PET substrates. (Small, 2016, DOI: 10.1002/smll.201600452).
The above work was supported by National Program on key basic research project (973 Program), Strategic Priority Research Program of the Chinese Academy of Science, Natural Science Foundation of China, and Basic Research Program of Jiangsu Province.
Contact information:Prof. ZHAO Jianwen
Suzhou Institute of Nano-Tech and Nano-Bionics ,Chinese Academy of Science
Suzhou, Jiangsu 215123, China.